Patent Number: 6,165,692

Title: Method for manufacturing a semiconductor device and an exposure mask used therefor

Abstract: A method for manufacturing a semiconductor device includes the steps of preparing an exposure mask in which repeat pattern portions obtained by repeatedly arranging the same pattern and non-repeat pattern portions are separately formed in a plurality of regions of one exposure mask and phase shifters for changing a phase of illumination light are provided in at least part of the repeat pattern portions, preparing a semiconductor wafer having a plurality of chip areas, aligning a pattern of one of the plurality of regions of the exposure mask with each of the plurality of chip areas on the semiconductor wafer, effecting an exposing process in an illuminating condition corresponding to the pattern of the above one region, aligning the pattern of a different one of the plurality of regions on the exposure mask with each of the plurality of chip areas on the semiconductor wafer, and effecting an exposing process in an illuminating condition corresponding to the pattern of the different one region, wherein the step of exposing the pattern of the different one of the plurality of regions on the exposure mask is repeatedly effected until the exposing process for all of the plurality of regions of the exposure mask is completed.

Inventors: Kanai; Hideki (Yokohama, JP), Ito; Shinichi (Yokohama, JP)

Assignee: Kabushiki Kaisha Toshiba

International Classification: G03F 1/00 (20060101); G03F 7/20 (20060101); G03C 005/00 ()

Expiration Date: 12/26/2013