Patent Number: 6,166,328

Title: Package stack via bottom leaded plastic (BLP) packaging

Abstract: A packaged semiconductor device has bottom surface leads having portions of the package adjacent the lead edges excised. The outer leads may take the form of inverted-J leads, short stub leads, vertically bent leads-in-grooves, or may be entirely eliminated. Lead connections are on the bottom package surface, over the top package surface, and/or on the sides and ends of the package, enabling vertical stacking of the devices and simultaneous/alternative coplanar horizontal connections to other semiconductor devices, circuit boards, etc. A mold assembly with a castellated inner surface forms a package with alternating grooves and columns for holding side and end electrical connection surfaces.

Inventors: Tandy; Patrick W. (Boise, ID)

Assignee: Micron Technology, Inc.

International Classification: H01L 21/02 (20060101); H01L 21/56 (20060101); H01L 23/48 (20060101); H01L 23/10 (20060101); H01L 23/31 (20060101); H01L 23/495 (20060101); H01L 23/02 (20060101); H01L 25/10 (20060101); H01L 23/28 (20060101); H05K 3/34 (20060101); H01L 023/02 ()

Expiration Date: 12/26/2017