Patent Number: 6,166,416

Title: CMOS analog semiconductor apparatus and fabrication method thereof

Abstract: A CMOS analog semiconductor apparatus and a fabrication method thereof are provided that are capable of selectively oxidizing a polysilicon to form a single layer having a conductive region and an insulation region of a semiconductor apparatus. The apparatus and method improve at least a step coverage problem of a semiconductor apparatus by using a simpler process. Further, the apparatus and method reduce a defective wiring and cracks to increase yield and reliability of the product. The apparatus can include a capacitor having a lower electrode formed on the field insulation layer of the semiconductor substrate, a first insulation layer formed on the field insulation layer including the lower electrode so as to expose a contact region for connecting with the lower electrode. An upper electrode is formed on an upper surface of the first insulation layer over the lower electrode except for the contact region. A resistance device is formed on the upper electrode. A lower electrode connection layer forms a contact portion with the lower electrode. A second insulation layer further defines the contact portion and insulates the upper electrode and the lower electrode connection layer. Finally, a patterned metallic layer contacts the lower electrode connection layer.

Inventors: Kim; Yong Chan (Kyungsangbuk-Do, KR)

Assignee: Hyundai Electronics Industries Co., Ltd.

International Classification: H01L 21/70 (20060101); H01L 21/8238 (20060101); H01L 27/06 (20060101); H01L 029/92 (); H01L 029/45 ()

Expiration Date: 12/26/2017