Patent Number: 6,166,557

Title: Process of selecting dies for testing on a wafer

Abstract: Integrated circuit die on wafer are electronically selected for testing using circuitry (161, 201, PA1-PA4) provided on the wafer.

Inventors: Whetsel; Lee D. (Allen, TX)

Assignee: Texas Instruments Incorporated

International Classification: G01R 31/28 (20060101); G01R 31/317 (20060101); G01R 031/28 ()

Expiration Date: 12/26/2017