Patent Number: 6,166,559

Title: Redundancy circuitry for logic circuits

Abstract: Redundant circuitry for a logic circuit such as a programmable logic device is provided. The redundant circuitry allows the logic circuit to be repaired by replacing a defective logic area on the circuit with a redundant logic circuit. Rows and columns of logic areas may be logically remapped by row and column swapping. The logic circuit contains dynamic control circuitry for directing programming data to various logic areas on the circuit in an order defined by redundancy configuration data. Redundancy may be implemented using either fully or partially redundant logic areas. Logic areas may be swapped to remap a partially redundant logic area onto a logic area containing a defect. The defect may then be repaired using row or column swapping or shifting. A logic circuit containing folded rows of logic areas may be repaired by replacing a defective half-row with a redundant half-row.

Inventors: McClintock; Cameron (Mountain View, CA), Lee; Andy L. (San Jose, CA), Cliff; Richard G. (Milpitas, CA)

Assignee: Altera Corporation

International Classification: G06F 11/20 (20060101); G11C 29/00 (20060101); H03K 19/177 (20060101); H03K 019/003 (); H03K 019/177 ()

Expiration Date: 12/26/2017