Patent Number: 6,166,587

Title: CMOS circuit for generating a current reference, the circuit comprising a transistor in a weak inversion region

Abstract: A current reference generator comprises a pair of identical units (G1, G2) which generate respective current references (I1, I2), and a circuit (CL) for the linear combination of the two references. In each of the two units, the elements (S1, S2) which, by their current-voltage characteristics, determine the working point comprise respectively a single transistor (T1) and a pair of transistors (T2, T3), of the same type as the first, connected in series. A differential amplifier (AD) maintains stable the working point of the respective unit as power supply voltage varies. (FIG. 2)

Inventors: Burzio; Marco (Grugliasco, IT), Balistreri; Emanuele (Battipaglia, IT)

Assignee: CSELT-Centro Studi E Laboratori Telecomunicazioni S.p.A.

International Classification: G05F 3/08 (20060101); G05F 3/26 (20060101); H03L 7/089 (20060101); H03L 7/08 (20060101); G05F 3/24 (20060101); G05F 001/10 ()

Expiration Date: 12/26/2017