Patent Number: 6,166,872

Title: Storage apparatus

Abstract: A read signal from a head is amplified by a read amplifier disposed on a head actuator and is fed via a pair of read only transmission paths through an FPC to a control board. The read only transmission paths are provided with a compensation circuit consisting of an inductance and a resistor which are connected in parallel. The compensation circuit compensates for degradation of frequency characteristics of a read signal attributable to stray capacitance of the FPC and to stray capacitance on the control board side.

Inventors: Uno; Hiroshi (Kawasaki, JP), Mitsunaga; Nobuyuki (Kawasaki, JP)

Assignee: Fujitsu Limited

International Classification: G11B 5/012 (20060101); G11B 5/09 (20060101); G11B 5/035 (20060101); G11B 5/48 (20060101); H05K 1/11 (20060101); G11B 005/035 (); G11B 005/09 ()

Expiration Date: 12/26/2013