Patent Number: 6,166,961

Title: Approach to provide high external voltage for flash memory erase

Abstract: In this invention external high voltages are connected to a chip containing a flash memory that are connected to selected cells to be erased. Internal pump circuits contained on the chip are turned off while the external voltages are used. The external voltages, a high negative voltage and a high positive voltage, are connected to gates and sources respectively of selected cells to be erased by a voltage control module. The external voltages are used during manufacture during program/erase operations to perform the erase function efficiently. The internal high voltage pump circuits are used to erase flash memory cells after being assembled on a circuit board by a user. Two level shifter circuits are disclosed that form a part of the voltage control module. The level shifter circuits apply voltages to the flash memory cells and provide voltages that select and deselect the cells for erasure.

Inventors: Lee; Peter Wung (Saratoga, CA), Hsu; Fu-Chang (Saratoga, CA), Chen; Mike Hsinyih (San Jose, CA)

Assignee: Aplus Flash Technology, Inc.

International Classification: G11C 16/10 (20060101); G11C 16/16 (20060101); G11C 5/14 (20060101); G11C 16/06 (20060101); G11C 016/04 ()

Expiration Date: 12/26/2017