Patent Number: 6,166,966

Title: Semiconductor memory device including data output circuit capable of high speed data output

Abstract: A semiconductor memory device includes an output control signal generation circuit for generating an output control signal to designate initiation of data output according to an external control signal, and a boosting circuit boosting an external power supply voltage. Each of the plurality of output control circuits generates an output permit signal with the output level of the boosting circuit as the activation level in response to activation of an output control signal. The output permit signals are transmitted to a plurality of output circuits by a corresponding one of a plurality of signal lines. Each of the plurality of output circuits drives the potential of a corresponding output terminal according to a read out data signal and an output permit signal.

Inventors: Maruyama; Yukiko (Hyogo, JP), Ikeda; Yutaka (Hyogo, JP), Yamasaki; Kyoji (Hyogo, JP)

Assignee: Mitsubihsi Denki Kabushiki Kaisha

International Classification: G11C 7/10 (20060101); G11C 007/00 ()

Expiration Date: 12/26/2017