Patent Number: 6,166,969

Title: Method and apparatus for a level shifter for use in a semiconductor memory device

Abstract: Disclosed is a level shifter that can receive and convert a first signal that can have various voltage logic levels to a second signal having internal voltage logic levels. The level shifter includes first and second ascending/descending circuits, where the first ascend/descending circuit receives the first signal and the second ascend/descending circuit receives an inverted first signal. Each ascend/descending circuit is operable to descend a high logic level of the received signal to a low output voltage level and ascend a low logic level of the received signal to a high output voltage level. The output voltages from the first and second ascending/descending circuits are input to a sense amplifier that amplifies the difference between the output voltages in order to generate the internal voltage logic levels of the second signal. The first and second ascending/descending circuits buffer their respective received signals using the high logic level of the input signal as a supply voltage. The same principles are also applicable to the level shifting from internal voltage logic levels to external voltage logic levels.

Inventors: Song; Byoung-Cheol (Youngin, KR), Yu; Hak-Soo (Seoul, KR), Lee; Kwang-Jin (Seoul, KR)

Assignee: Samsung Electronics, Co., Ltd.

International Classification: G11C 7/06 (20060101); H03K 19/0185 (20060101); G11C 007/00 ()

Expiration Date: 12/26/2013