Patent Number: 6,166,978

Title: Semiconductor differential amplifier having a gain controlled by a memory transistor

Abstract: A semiconductor device includes a differential amplifier, a current mirror circuit and a control current supply circuit. The amplifier has a first and a second transistor forming an input differential pair, the first transistor having a first gate and a first and a second impurity diffusion layer, the second transistor having a second gate and a third and a fourth impurity diffusion layer. The current mirror circuit has a third and a fourth transistor, the third transistor having a third gate and a fifth and a sixth impurity diffusion layer, the fourth transistor having a fourth gate and a seventh and an eighth impurity diffusion layer. The control current supply circuit has a non-volatile memory transistor having a control gate, a charge accumulating layer and a ninth and a tenth impurity diffusion layer. The first and the fifth impurity diffusion layers and the third and the fourth gates are connected to each other via a first wiring layer. The third and the seventh impurity diffusion layers are connected to each other via a second wiring layer. The sixth and the eighth impurity diffusion layers are connected to a first constant voltage supply via a third wiring layer. And, the second and the fourth impurity diffusion layers are connected to a second constant voltage supply via at least a fourth wiring layer, the first control current supply circuit and a fifth wiring layer.

Inventors: Goto; Mitsuhiko (Chiyoda-ku, JP)

Assignee: Nippon Steel Corporation

International Classification: G11C 7/06 (20060101); H03G 1/00 (20060101); H03F 3/72 (20060101); G11C 007/02 ()

Expiration Date: 12/26/2017