Patent Number: 6,166,989

Title: Clock synchronous type semiconductor memory device that can switch word configuration

Abstract: Data buses are arranged in a one-to-one correspondence to pads. These data buses are arranged in common to a plurality of memory arrays. A read data driver is rendered active selectively according to a word configuration to switch equivalently the connection between a memory array and a data bus.

Inventors: Hamamoto; Takeshi (Hyogo, JP), Ariki; Takuya (Hyogo, JP), Asakura; Mikio (Hyogo, JP), Nishiyama; Takayuki (Hyogo, JP)

Assignee: Mitsubishi Denki Kabushiki Kaisha

International Classification: G11C 7/10 (20060101); G11C 8/12 (20060101); G11C 8/00 (20060101); G11C 008/00 ()

Expiration Date: 12/26/2017