Patent Number: 6,167,132

Title: Analog successive approximation (SAR) analog-to-digital converter (ADC)

Abstract: An analog successive approximation (SAR) analog-to-digital converter (ADC) is disclosed that is a compromise between a SAR ADC implementation and a fully parallel thermometer-to-binary ADC. The analog SAR ADC utilizes N comparators for N bits of output and does not require a clock system, control logic, decode logic, or thermometer-to-binary decode circuitry. Conversion speed is determined by the comparator rate, and the comparator outputs may be used directly as the ADC outputs. The analog SAR ADC disclosed is a low complexity, low-precision analog-to-digital converter (ADC) that may be used to digitize phone line status information so that it may be communicated across a isolation barrier as digital information.

Inventors: Krone; Andrew W. (Austin, TX), Scott; Jeffrey W. (Austin, TX), Sooch; Navdeep S. (Austin, TX), Welland; David R. (Austin, TX)

Assignee: Silicon Laboratories, Inc.

International Classification: H03M 1/38 (20060101); H04M 1/57 (20060101); H04L 25/06 (20060101); H04M 11/06 (20060101); H03M 1/42 (20060101); H04M 19/00 (20060101); H04M 19/02 (20060101); H04L 7/033 (20060101); H04M 001/00 (); H04M 009/08 (); H03M 003/00 ()

Expiration Date: 12/26/2013