Patent Number:
6,167,419
Title:
Multiplication method and multiplication circuit
Abstract:
A multiplication method and a multiplication circuit, wherein a multiplicand is multiplied by a multiplier using a multiplication process, the result of the multiplication is added by an addition process to a rounding signal to be output from a rounding signal generation process, and the result of the addition, i.e., a multiplication result obtained after rounding, is stored in a register. By a barrel shifter, the multiplication result obtained after rounding stored in the register is shifted by a bit count indicated by a shift bit count signal. The shift bit count signal output from an instruction control process is input to the barrel shifter and a rounding signal generation process. The rounding signal generation process generates a rounding signal on the basis of the shift bit count signal indicating the bit count used to shift the multiplication result after rounding. By carrying out a rounding process in the addition process by using the rounding signal, the rounding process can be carried out at an appropriate position desired by the user without increasing instruction code or storage.
Inventors:
Saishi; Mana (Fukuoka, JP), Kurohmaru; Shunichi (Fukuoka, JP)
Assignee:
Matsushita Electric Industrial Co., Ltd.
International Classification:
G06F 5/01 (20060101); G06F 7/48 (20060101); G06F 7/52 (20060101); G06F 007/52 (); G06F 007/38 ()
Expiration Date:
12/26/2017