Patent Number: 6,167,467

Title: Information reception and recording circuit

Abstract: When a transmission request reception process controller accepts a request to transmit information, the information is read from a memory in order of addresses generated by an address generator. A transmission information generator adds addresses of the information to the read information, for transmission to the transmission requester. When accepting another request to transmit the same information while the information is being transmitted, the transmission request reception process controller causes the information to be transmitted to the latter transmission requester starting at the current point in the information being transmitted to the former transmission requester. After generating the last address of information, the address generator returns to the top address and again continues generating the addresses of the information. The information read from the memory according to the generated addresses is transmitted from output circuits 14 and 16. Each receiving party (information transmission requester) receives the transferred information and records it on record media thereof based on the addresses added to the information.

Inventors: Itoh; Shigeyuki (Kawasaki, JP), Aizawa; Iwao (Yokohama, JP)

Assignee: Hitachi, Ltd.

International Classification: H04N 7/173 (20060101); H04N 5/00 (20060101); G06F 013/00 ()

Expiration Date: 12/26/2017