Patent Number: 6,167,480

Title: Information packet reception indicator for reducing the utilization of a host system processor unit

Abstract: A reception indicator is within a network peripheral that receives information packets for a host system from a communications network. The reception indicator of the present invention allows the network peripheral to operate in one of a plurality of modes. The reception indicator of the present invention asserts an interrupt signal at a respective optimum interrupt time for each of the modes. If the network peripheral is operating in a programmed I/O mode (i.e. a slave mode), a slave optimum interrupt time is determined. In this mode, a host processor unit within the host system reads portions of information packets from a readable data port in a host system interface. In this mode, an interrupt is asserted at the slave optimum interrupt time before a last byte of an information packet is expected to be received from the communications network. If the network peripheral is operating in a DMA (Direct Memory Access) mode, a DMA (Direct Memory Access) optimum interrupt time is determined. In this mode, the network peripheral automatically transfers the received information packet to a host memory of the host system. In this mode, an interrupt signal is asserted at the DMA optimum interrupt time before a last byte of an information packet is expected to be copied to the host memory. In this manner, the present invention allows the network peripheral and the host system to operate in one of the modes that is most efficient for data processing while at the same time issuing an interrupt at a respective optimum interrupt time for each of the modes.

Inventors: Williams; Robert A. (Cupertino, CA), Tsai; Din-I (Fremont, CA), Kuo; Jerry C. (San Jose, CA)

Assignee: Advanced Micro Devices, Inc.

International Classification: G06F 13/12 (20060101); G06F 013/14 ()

Expiration Date: 12/26/2017