Patent Number: 6,167,504

Title: Method, apparatus and computer program product for processing stack related exception traps

Abstract: Apparatus, methods, and computer program products are disclosed that improve the operation of a computer that uses a top-of-stack cache by reducing the number of overflow and underflow traps generated during the execution of a program. The invention maintains a predictor value that controls the number of stack elements that are spilled from, or filled to, the top-of-stack cache in response to an overflow trap or an underflow trap (respectively). The predictor reflects the history of overflow traps and underflow traps.

Inventors: Damron; Peter C. (Fremont, CA)

Assignee: Sun Microsystems, Inc.

International Classification: G06F 9/30 (20060101); G06F 9/38 (20060101); G06F 9/46 (20060101); G06F 9/40 (20060101); G06F 011/36 ()

Expiration Date: 12/26/2017