Patent Number: 6,167,544

Title: Method and apparatus for testing dynamic random access memory

Abstract: A method and apparatus for reducing the time for determining a memory refresh frequency for a dynamic random access memory. The method includes disabling the bootstrap circuitry associated with a word line when writing data into a memory cell during a test operation. For instances in which data representing a high logic level is written into the memory cell, the resulting charge that is stored is less than the stored charge under normal operation of the dynamic memory. Consequently, the decay time for the stored charge is shortened, thereby shortening the time for testing the refresh frequency of the memory cell. Testing time for the dynamic memory is thus reduced.

Inventors: Brady; James (Plano, TX)

Assignee: STMicroelectronics, Inc.

International Classification: G11C 29/50 (20060101); G11C 29/04 (20060101); G11C 029/00 ()

Expiration Date: 12/26/2017