Patent Number: 6,169,529

Title: Circuit and method for controlling the color balance of a field emission display

Abstract: A circuit and method for time multiplexing a voltage signal for controlling the color balance of a flat panel display. Within an FED screen, a matrix of rows and columns is provided and emitters are situated within each row-column intersection. Rows are sequentially activated during "row on-time windows" by row drivers and corresponding individual gray scale information (voltages) are driven over the columns by column drivers. When the proper voltage is applied across the cathode and anode of the emitters, electrons are released toward a phosphor spot, e.g., red, green, blue, causing illumination. Within each column driver, the present invention provides selection circuitry for driving a first voltage signal during a first part of the row on-time window and a second voltage during a second part of the row on-time window. The lengths of the first part and second part of the row on-time window can be adjusted for a given color, to adjust the color balance with respect to that color, e.g., red, green or blue. In one embodiment, a shift register is used to divide a digital representation of the first voltage value in half for application during the second part of the row on-time window. In a second embodiment, a multiplexer is used to divide the first voltage value in half for application during the second part. In a third embodiment, the first and second parts of the row on-time window are swapped such that two first parts occur consecutively and two second parts occur consecutively over a period of two row on-time windows. The third embodiment reduces the frequency of voltage change and thereby saves power.

Inventors: Hansen; Ronald L. (San Jose, CA), Friedman; Jay (Felton, CA), Stoian; Lee (Saratoga, CA)

Assignee: Candescent Technologies Corporation

International Classification: G09G 3/22 (20060101); G09G 003/22 ()

Expiration Date: 01/02/2018