Patent Number: 6,170,036

Title: Semiconductor memory device and data transfer circuit for transferring data between a DRAM and a SRAM

Abstract: A semiconductor memory device is configured to include a static random access memory (SRAM) array and a dynamic random access memory (DRAM) array. The memory device includes an internal data line which enables the transfer of data blocks between the SRAM and DRAM arrays. Data transfer circuitry is provided separately from the internal data line and includes a latch circuit for latching the data to be transferred. The data transfer circuitry is responsive to a transfer designating signal.

Inventors: Konishi; Yasuhiro (Hyogo-ken, JP), Dosaka; Katsumi (Hyogo-ken, JP), Hayano; Kouji (Hyogo-ken, JP), Kumanoya; Masaki (Hyogo-ken, JP), Yamazaki; Akira (Hyogo-ken, JP), Iwamoto; Hisashi (Hyogo-ken, JP)

Assignee: Mitsubishi Denki Kabushiki Kaisha

International Classification: G06F 12/08 (20060101); G11C 7/10 (20060101); G11C 11/00 (20060101); G06F 013/00 (); G11C 011/407 (); G11C 011/413 ()

Expiration Date: 01/02/2018