Patent Number: 6,200,629

Title: Method of manufacturing multi-layer metal capacitor

Abstract: A method for manufacturing a capacitor includes the steps of forming a dielectric layer over a substrate, and then forming at least one contact within the dielectric layer. Next, a first metal layer is formed on the dielectric layer and an electromigration layer is formed on the first metal layer. A patterned capacitor dielectric layer is formed on the electromigration layer in a capacitor area. A second metal layer is then formed over the substrate and defined; a portion of second metal serving as an upper electrode of the capacitor is therefore formed on the electromigration layer. A portion of the second metal layer on the contact serves as a portion of the via of the interconnects. The electromigration layer is self-alignedly patterned when patterning the second metal layer, and a portion of the electromigration layer serves as a lower electrode of the capacitor. The electromigration layer on the contact in the via area is used to prevent electromigration.

Inventors: Sun; Shih-Wei (Taipei, TW)

Assignee: United Microelectronics Corp.

International Classification: H01L 21/60 (20060101); H01L 21/02 (20060101); H01L 27/08 (20060101); B05D 005/12 ()

Expiration Date: 03/13/2018