Patent Number: 6,251,711

Title: Method for forming bridge free silicide

Abstract: The proposed invention is a salicide process that is used to avoid bridge phenomena. In short, the proposed method for forming silicide without bridge phenomena comprises following steps: providing a substrate with a pad layer on the substrate; forming a first cap layer on the pad layer; defining a trench region; removing part of both the pad layer and the first cap layer that are located inside the trench region such that a trench is formed; filling the trench by a gate oxide layer and a polysilicon layer in sequence; capping a first metal layer on the polysilicon layer; performing a first rapid thermal process to form a first silicide layer over the gate oxide layer; removing excess the first metal layer; forming a second cap layer on the first silicide layer; planarizing surface of both the first cap layer and the second cap layer; removing the first cap layer; removing part of the pad layer that is not covered by the gate oxide layer and then a gate structure being formed; forming two light doped drain in the substrate; forming a spacer on sidewall of the gate structure; forming a sources and a drain in the substrate, herein the source and the drain is located around the light doped drains; forming some second metal layers on both the source and the drain; performing a second thermal process to form two second silicide layer over the source and the drain; removing excess the second metal layer; and then forming a third rapid thermal process.

Inventors: Fang; Edberg (Yun-Lin, TW), Hsieh; Wen-Yi (Hsin-Chu, TW), Tsai; Teng-Chun (Hsin-Chu, TW)

Assignee: United Microelectronics Corp.

International Classification: H01L 21/02 (20060101); H01L 21/336 (20060101); H01L 21/28 (20060101); H01L 21/285 (20060101); H01L 021/335 ()

Expiration Date: 06/26/2018