Patent Number: 6,251,723

Title: Method for manufacturing semiconductor memory device capable of improving isolation characteristics

Abstract: In a method for manufacturing a semiconductor memory device, a plurality of openings are perforated in an insulating layer formed on first impurity diffusion regions for bit lines and second impurity diffusion regions for capacitors of a semiconductor substrate surrounded by a field insulating layer, and each of the openings corresponds to one of the first impurity diffusion regions and at least two of the second impurity diffusion regions.

Inventors: Takaishi; Yoshihiro (Tokyo, JP)

Assignee: NEC Corporation

International Classification: H01L 21/02 (20060101); H01L 21/70 (20060101); H01L 21/60 (20060101); H01L 21/8242 (20060101); H01L 27/108 (20060101); H01L 021/824 (); H01L 021/28 (); H01L 021/768 ()

Expiration Date: 06/26/2018