Patent Number: 6,251,732

Title: Method and apparatus for forming self-aligned code structures for semi conductor devices

Abstract: Improved methods for forming integrated circuit devices with alignment structures such as a read-only memory (ROM) array in preparation for code programming with a mask is disclosed. In one embodiment, a gate oxide layer is deposited over a substrate and a gate stack layer is formed over the gate oxide layer. The gate stack layer includes a conductive layer and a sacrificial gate layer formed above the conductive layer with a thin layer of etch stop material in between. The gate stack layer is patterned and etched to form a plurality of wordlines having openings therebetween. An ion barrier layer is deposited over the patterned gate stacks, filling the openings. The ion barrier layer is then etched back to form alignment structures in the openings. A code programming mask, is deposited over the resulting structure and patterned to expose portions of the sacrificial gates. The exposed portions of the plurality of sacrificial gates are removed, followed by ion implantation in the designated channel regions.

Inventors: Hsu; James (Saratoga, CA)

Assignee: Macronix International Co., Ltd.

International Classification: H01L 21/70 (20060101); H01L 21/8246 (20060101); H01L 021/823 ()

Expiration Date: 06/26/2018