Patent Number: 6,251,734

Title: Method for fabricating trench isolation and trench substrate contact

Abstract: A method of manufacturing semiconductor components includes etching two trenches (105, 106, 805, 806, 1205, 1206) into a surface of a substrate (101, 801, 1201), lining the two trenches (105, 106, 805, 806, 1205, 1206) with an electrically insulative layer (107, 807, 1207) that is never completely removed from a first one of the two trenches (105, 106, 805, 806, 1205, 1206), and simultaneously filling the two trenches (105, 106, 805, 806, 1205, 1206) with a material wherein the material is never completely removed from the first one of the two trenches (105, 106, 805, 806, 1205, 1206) and wherein the second one of the two trenches (105, 106, 805, 806, 1205, 1206) becomes electrically coupled to the substrate (101, 801, 1201).

Inventors: Grivna; Gordon M. (Mesa, AZ), Robert; Georges M. (Mesa, AZ)

Assignee: Motorola, Inc.

International Classification: H01L 21/762 (20060101); H01L 21/70 (20060101); H01L 021/336 ()

Expiration Date: 06/26/2018