Patent Number: 6,251,751

Title: Bulk and strained silicon on insulator using local selective oxidation

Abstract: A method for forming buried oxide regions below a single crystal semiconductor layer incorporating the steps of forming epitaxial layers having different rates of oxidation with the lower layer having a faster rate of oxidation and oxidizing the layers through an opening in a mask. A plurality of oxide isolated FET's may be formed. The invention reduces the problem of source/drain parasitic capacitance and short channel effects while isolating FET's and eliminating floating body effects of an FET by selectively oxidizing semiconductor layers.

Inventors: Chu; Jack Oon (Astoria, NY), Ismail; Khalid Ezzeldin (Yorktown Heights, NY), Lee; Kim Yang (Fremont, CA), Ott; John Albrecht (Greenwood Lake, NY)

Assignee: International Business Machines Corporation

International Classification: H01L 21/762 (20060101); H01L 21/70 (20060101); H01L 021/76 ()

Expiration Date: 06/26/2018