Patent Number: 6,251,753

Title: Method of sidewall capping for degradation-free damascene trenches of low dielectric constant dielectric by selective liquid-phase deposition

Abstract: A low dielectric constant (k) material, such as methylsilsesquioxane (MSQ), used as an interlevel dielectric is expected to reduce the parasitic capacitance in integrated circuit. However, MSQ film can be easily degraded during resist ashing after the film is etched with the damascene trenches being created. The present invention discloses an innovative sidewall capping technology to solve the degradation issue. Prior to resist ashing, a high-quality, low-k oxide film is selectively deposited onto the sidewalls of MSQ trenches using selective liquid-phase deposition. Experimental results demonstrate that the capping oxide can effectively protect the sidewalls of MSQ trenches from ashing-induced degradation.

Inventors: Yeh; Ching-Fa (N/A), N/A (Hsinchu, TW), Lee; Yueh-Chuan (N/A), N/A (Hsinchu, TW), Su; Yuh-Ching (Hsinchu, TW), Wu; Kwo-Hau (Hsinchu, TW)


International Classification: H01L 21/02 (20060101); H01L 21/70 (20060101); H01L 21/768 (20060101); H01L 21/312 (20060101); H01L 021/76 ()

Expiration Date: 06/26/2018