Patent Number: 6,251,763

Title: Semiconductor device and method for manufacturing same

Abstract: A method of manufacturing a semiconductor device comprising the steps of forming a dummy film and a dummy gate pattern at a predetermined gate-forming region on a semiconductor substrate, forming a first side wall insulating film on a side wall of the dummy gate pattern, forming an interlayer insulating film on a position of the semiconductor substrate around the dummy gate pattern bearing the first side wall insulating film, forming a groove by removing the dummy gate pattern, removing a portion of dummy film exposed through the groove while leaving a portion of the first side wall insulating film as well as a portion of the dummy film disposed below the portion of the first side wall insulating film, forming a gate insulating film at least on a bottom surface of the groove, and forming a gate electrode on the gate insulating film formed in the groove.

Inventors: Inumiya; Seiji (Tokyo, JP), Hieda; Katsuhiko (Yokohama, JP), Matsuda; Tetsuo (Gumma-ken, JP), Ozawa; Yoshio (Yokohama, JP)

Assignee: Kabushiki Kaisha Toshiba

International Classification: H01L 21/02 (20060101); H01L 21/336 (20060101); H01L 21/28 (20060101); H01L 29/49 (20060101); H01L 29/423 (20060101); H01L 29/40 (20060101); H01L 021/320 ()

Expiration Date: 06/26/2018