Patent Number: 6,251,786

Title: Method to create a copper dual damascene structure with less dishing and erosion

Abstract: A dual damascene structure is created in a dielectric layer, the structure contains a barrier layer while a cap layer may or may not be provided over the layer of dielectric for further protection of the dual damascene structure. The surface of the copper in the dual damascene structure is recessed, a thin film is deposited and planarized/partially removed by either CMP or a plasma etch thereby providing a sturdy surface above the copper of the dual damascene structure that prevents dishing and erosion of this surface.

Inventors: Zhou; Mei Sheng (Singapore, SG), Ho; Paul Kwok Keung (Singapore, SG), Gupta; Subhash (Singapore, SG)

Assignee: Chartered Semiconductor Manufacturing Ltd.

International Classification: H01L 21/02 (20060101); H01L 23/52 (20060101); H01L 21/70 (20060101); H01L 21/768 (20060101); H01L 23/532 (20060101); H01L 21/321 (20060101); H01L 021/00 ()

Expiration Date: 06/26/2018