Patent Number: 6,251,789

Title: Selective slurries for the formation of conductive structures

Abstract: An embodiment of the instant invention is a method of fabricating a semiconductor device with a patterned dielectric layer having an upper surface and an opening with a bottom and sidewalls formed over a semiconductor substrate, the method comprising the steps of: forming a liner layer (layer 434 of FIGS. 1b-1d) on the upper surface of the patterned dielectric layer and on the bottom and the sidewalls of the opening in the patterned dielectric layer; forming a conductive layer (layer 436 of FIGS. 1b-1d) on the liner layer; removing the portion of the conductive layer which overlies the top surface of the dielectric layer thereby exposing a portion of the liner layer while leaving the portion of the conductive layer situated in the opening of the dielectric layer substantially unremoved, the step of removing the portion of the conductive layer is accomplished by chemical mechanical polishing using a first slurry; removing the exposed portion of the liner layer while leaving the unexposed portion of the liner layer substantially unremoved by chemical mechanical polishing using a second slurry; and wherein the first slurry removes the conductive layer much more readily than the liner layer and the second slurry removes the liner layer more readily than the conductive layer.

Inventors: Wilson; Arthur M. (Richardson, TX), larsen; Jody D. (Richardson, TX)

Assignee: Texas Instruments Incorporated

International Classification: H01L 21/02 (20060101); H01L 21/70 (20060101); H01L 21/768 (20060101); H01L 21/321 (20060101); H01L 021/302 ()

Expiration Date: 06/26/2018