Patent Number: 6,251,797

Title: Method of fabricating semiconductor device

Abstract: In the present invention, an electrode having a structure in which a barrier layer 16 and a seed layer 17 are stacked on an electrode 12b is formed. In the electrode having such a structure, when an Al wiring film is formed, the barrier layer 16 and the seed layer 17 may be stacked by sputtering after the wiring film is formed. That is, at the time of forming wiring, the barrier layer 16 and the seed layer 17 may be stacked on the surface of the wiring. Accordingly, the formation of a bump and particularly, the formation of the seed layer for the bump are performed together with the wiring formation and protective film formation processing. Accordingly, the steps of fabricating a semiconductor are simplified, so that a time period required for the fabrication is shortened.

Inventors: Nishimura; Isamu (Kyoto, JP)

Assignee: Rohm Co., Ltd.

International Classification: H01L 21/02 (20060101); H01L 21/60 (20060101); H01L 021/00 ()

Expiration Date: 06/26/2018