Patent Number: 6,252,904

Title: High-speed decoder for a multi-pair gigabit transceiver

Abstract: A method and a system for providing an input signal from a multiple decision feedback equalizer to a decoder based on a tail value and a subset of coefficient values received from a decision-feedback equalizer. A set of pre-computed values based on the subset of coefficient values is generated. Each of the pre-computed values is combined with the tail value to generate a tentative sample. One of the tentative samples is selected as the input signal to the decoder. In one aspect of the system, tentative samples are saturated and then stored in a set of registers before being outputted to a multiplexer which selects one of the tentative samples as the input signal to the decoder. This operation of storing the tentative samples in the registers before providing the tentative samples to the multiplexer facilitates high-speed operation by breaking up a critical path of computations into substantially balanced first and second portions, the first portion including computations in the decision-feedback equalizer and the multiple decision feedback equalizer, the second portion including computations in the decoder.

Inventors: Agazzi; Oscar E. (Irvine, CA), Kruse; David (Newport Beach, CA), Abnous; Arthur (Irvine, CA), Hatamian; Mehdi (Mission Viejo, CA)

Assignee: Broadcom Corporation

International Classification: G01R 31/30 (20060101); G01R 31/28 (20060101); G01R 31/317 (20060101); G01R 31/3185 (20060101); H04L 1/24 (20060101); H04L 1/00 (20060101); H04B 3/32 (20060101); H04L 25/49 (20060101); H04L 25/14 (20060101); H04B 3/02 (20060101); H04L 7/033 (20060101); H04L 25/03 (20060101); H04L 25/06 (20060101); H04B 3/23 (20060101); H04L 25/497 (20060101); H04L 7/02 (20060101); H03H 007/30 ()

Expiration Date: 06/26/2018