Patent Number: 6,253,233

Title: Multi-cut system

Abstract: A multi-CPU system capable of facilitating a change of a program for each of CPUs of a slave-side section and constructing a control program on a side of only a slave-side section, to thereby facilitate preparation of the control program. A shared memory is connected to buses, resulting in a multi-CPU system being separated into a master-side section and a slave-side section, with the shared memory being interposed therebetween. A measure/control function blocks connected to a measured/controlled equipment and a ROM stored therein with an activation program for down-loading a program to a RAM of a slave CPU block are connected to the bus for the slave-side section. Then, the RAM is stored therein with the program down-loaded through the buses, resulting in the measured/controlled equipment being controlled according to the program.

Inventors: Hayashi; Shouichi (Omiya, JP)

Assignee: Wellbean Co., Inc.

International Classification: G06F 13/16 (20060101); H04L 12/417 (20060101); H04L 12/407 (20060101); G06F 015/16 ()

Expiration Date: 06/26/2018