Patent Number: 6,253,262

Title: Arbitrating FIFO implementation which positions input request in a buffer according to its status

Abstract: A system (100) for automatically ordering a request for access to a system memory (14) is disclosed. The system (100) includes a re-ordering buffer (102) having a data input (120) and a data output (122) and an input request position identifier (104) associated with the re-ordering buffer (102). The input request position identifier (104) indicates a position of the data input (120) in the re-ordering buffer (102) for the new request based on a status of the request. A method (230) of ordering a request for access to a system memory (14) in a buffer (102) is also disclosed and includes initiating a request (232) for access to the system memory (14), wherein the request contains a status indicating a priority of the request. The status of the request is evaluated (234) to determine whether the request is a high priority request or a low priority request and a location for inputting the access request into the buffer (102) is identified (236) in response to the evaluation. One or more previously requested access requests are then shifted (240) within the buffer if necessary to make room for the access request at the identified location and the new access request is inserted into the buffer at the identified location (242).

Inventors: Rozario; Ranjit J. (San Jose, CA), Waldron; Scott (Belmont, CA), Cherukuri; Ravikrishna (Milpitas, CA)

Assignee: Advanced Micro Devices, Inc.

International Classification: G06F 13/16 (20060101); G06F 13/18 (20060101); G06F 013/18 ()

Expiration Date: 06/26/2018