Patent Number: 6,253,299

Title: Virtual cache registers with selectable width for accommodating different precision data formats

Abstract: A structure and method for processing data comprises a processing unit having a base cache, base registers having a base width and being operatively connected to the processing unit, and virtual cache registers having a virtual width and being located in the base cache and operatively connected to the processing unit, wherein a base processing precision of the processing system is determined by the base width of the base registers and a selectable enhanced processing precision is determined by the virtual width of the virtual cache registers, wherein the base registers store base instructions and data and the virtual cache registers store enhanced data, the virtual width being greater than the base width, and wherein the base cache includes tags identifying a portion of the base cache as the virtual registers, the virtual cache registers being accessible by the processing unit only for execution of enhanced instructions for providing the enhanced processing precision.

Inventors: Smith; Jack R. (South Burlington, VT), Ventrone; Sebastian T. (South Burlington, VT), Williams; Keith R. (Essex Junction, VT)

Assignee: International Business Machines Corporation

International Classification: G06F 12/08 (20060101); G06F 9/30 (20060101); G06F 9/318 (20060101); G06F 012/00 ()

Expiration Date: 06/26/2018