Patent Number: 6,253,305

Title: Microprocessor for supporting reduction of program codes in size

Abstract: A microprocessor is provided for supporting reduction of codes in size, wherein instructions are extended in units of 0.5 word from a basic one word code. A word of instruction, fetched from an external memory, is transferred to a decoding register via instruction buffers and a selector both operate in units of half words, then is decoded by a decoder. A storage unit stores a state of an instruction stored in an instruction buffer. A controlling unit controls the selector so that the instructions are transferred from instruction buffers to the decoding register in units of half words based on a direction from the decoder and the states stored in the storage unit.

Inventors: Matsuzaki; Toshimichi (Minoh, JP), Deguchi; Masashi (Nara, JP), Hamaguchi; Toshifumi (Takatsuki, JP), Tanase; Yutaka (Kyoto, JP), Matsumoto; Masahiko (Nagaokakyo, JP)

Assignee: Matsushita Electric Industrial Co., Ltd.

International Classification: G06F 9/30 (20060101); G06F 9/38 (20060101); G06F 9/318 (20060101); G06F 009/22 ()

Expiration Date: 06/26/2018