Patent Number: 6,253,315

Title: Return address predictor that uses branch instructions to track a last valid return address

Abstract: A processor pipeline includes a return stack buffer (RSB) and a top of stack pointer (RSB_TOS) to indicate the status of buffer entries. A copy of the current RSB_TOS (C_TOS) is associated with each branch instruction that is detected at the front end of the pipeline. When the branch instruction is a call instruction that is predicted taken, an associated return address is pushed onto the RSB and the current RSB_TOS is updated. When the branch instruction is a return instruction that is predicted taken, the return address indicated by the current RSB_TOS pointer is popped from the RSB and the current RSB_TOS is updated. When a branch is determined to have been mispredicted, the associated C_TOS is adjusted according to the type of branch misprediction and RSB_TOS is updated with the adjusted C_TOS.

Inventors: Yeh; Tse-Yu (Milpitas, CA)

Assignee: Intel Corporation

International Classification: G06F 9/38 (20060101); G06F 009/32 ()

Expiration Date: 06/26/2018