Patent Number: 6,253,342

Title: Semiconductor integrated circuit

Abstract: Micro-computer capable of independently testing an additional logic for user and a pre-existing micro-computer portion in a shipment test of the micro-computer having the enclosed additional logic for user. A logic dedicated to connection is directly coupled to an internal bus of the micro-computer and is provided between the additional logic for user and the micro-computer. For testing the additional logic for user, a bus/port changeover terminal of the micro-computer and a read/write signal are used to effect readout/writing. Also, a bus inspection register is provided in the logic dedicated to connection. For testing the micro-computer, an output of the inspection register is read out to a bus of the logic dedicated to connection to inspect the bus.

Inventors: Mine; Kazumasa (Tokyo, JP)

Assignee: NEC Corporation

International Classification: G06F 11/267 (20060101); G06F 15/78 (20060101); G06F 15/76 (20060101); G06F 13/20 (20060101); G06F 13/24 (20060101); G01R 031/28 ()

Expiration Date: 06/26/2018