Patent Number: 6,254,758

Title: Method of forming conductor pattern on wiring board

Abstract: A method of forming a conductor pattern on a wiring board, in which a conductor pattern forming process on the wiring board can be simplified; and an interval between the conductor patterns can be further reduced by suppressing the etching conducted on the side portions of the electrolytic copper plated layer. The method of forming a conductor pattern on a wiring board in which an electroless copper plated layer 12 is formed on a surface of an insulating layer 10 of the wiring board and an electrolytic copper plated layer 16 is formed on the electroless copper plated layer 12, comprises the steps of: forming an electroless copper plated layer 12 on the insulating layer 10; forming and patterning a layer of resist 14 on the electroless copper plated layer 12; forming an electrolytic copper plated layer 16 on the electroless copper plated layer 12 exposed from the layer of plated resist 14; removing the layer of plated resist 14 for exposing the electroless copper plated layer 12 except for a portion in which the electrolytic copper plated layer 16 is formed; and removing the exposed electroless copper plated layer 12 by using an etching solution composed of a mixed aqueous solution containing sulfuric acid, hydrogen peroxide and Cu chelate agent.

Inventors: Koyama; Toshinori (Nagano, JP)

Assignee: Shinko Electric Industries Co., Ltd.

International Classification: C23F 1/18 (20060101); C23F 1/10 (20060101); H05K 3/10 (20060101); C23C 028/02 (); C25D 005/02 (); C25D 005/50 ()

Expiration Date: 07/03/2018