Patent Number: 6,255,130

Title: Thin film transistor array panel and a method for manufacturing the same

Abstract: Disclosed is a simplified method for manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad, and a gate electrode is formed on the substrate. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited, and a photoresist layer is coated thereon. The photoresist layer is exposed to light through a mask and developed to form a photoresist pattern. At this time, the first portion of the photoresist pattern that is located between the source electrode and the drain electrode is thinner than the second portion that is located on the data wire, and the rest of the photoresist layer are wholly removed. The thin portion is made by controlling the exposure or by a reflow process to form a thin portion. And exposure is controlled by using a mask that has a slit, a small pattern smaller than the resolution of the exposure device, or a partially transparent layer. Next, the exposed portions of conductor layer are removed by wet etch or dry etch, thereby the ohmic contact layer thereunder is exposed. Then the exposed ohmic contact layer and the semiconductor layer thereunder are removed by dry etching along with the first portion of the photoresist layer. The residue of the photoresist layer is removed by ashing. Source/drain electrodes are separated by removing the portion of the conductor layer at the channel and the ohmic contact layer pattern thereunder. Then, the second portion of the photoresist layer is removed, and a passivation layer, a pixel electrode, a redundant gate pad, and a redundant data pad are formed.

Inventors: Kim; Dong-Gyu (Kyungki-do, KR)

Assignee: Samsung Electronics Co., Ltd.

International Classification: G02F 1/1362 (20060101); G02F 1/13 (20060101); H01L 021/00 ()

Expiration Date: 07/03/2018