Patent Number: 6,255,149

Title: Process for restricting interdiffusion in a semiconductor device with composite Si/SiGe gate

Abstract: A method which includes, prior to depositing the encapsulating silicon layer: A) depositing on the Si.sub.1-x Ge.sub.x layer a thin film of amorphous or polycrystalline silicon, then in treating said silicon film with gas nitric oxide at a temperature between 450 to 600.degree. C. and at a pressure level of 10.sup.4 to 10.sup.5 Pa to obtain a thin nitrided silicon film; or B) depositing on the Si.sub.1-x Ge.sub.x layer a thin film of amorphous or polycrystalline silicon and oxidizing the silicon film to form a surface film of silicon oxide less than 1 nm thick and optionally treating the oxidized amorphous or polycrystalline silicon film with nitric oxide as in A). The invention is applicable to CMOS semiconductors.

Inventors: Bensahel; Daniel (Grenoble, FR), Campidelli; Yves (Grenoble, FR), Martin; Fran.cedilla.ois (Grenoble, FR), Hernandez; Caroline (Grenoble, FR)

Assignee: France Telecom

International Classification: H01L 21/02 (20060101); H01L 21/28 (20060101); H01L 29/49 (20060101); H01L 29/40 (20060101); H01L 021/338 ()

Expiration Date: 07/03/2018