Patent Number: 6,255,158

Title: Process of manufacturing a vertical dynamic random access memory device

Abstract: A dynamic random access memory (DRAM) device. The DRAM device is formed in a substrate having a top surface and a trench with a sidewall formed in the substrate. A signal storage node is formed using a bottom portion of the trench and a signal transfer device is formed using an upper portion of the trench. The signal transfer device includes a first diffusion region coupled to the signal storage node and extending from the sidewall of the trench into the substrate a second diffusion region formed in the substrate adjacent to the top surface of the substrate and adjacent the sidewall of the trench, a channel region extending along the sidewall of the trench between the first diffusion region and the second diffision region, a gate insulator formed along the sidewall of the trench extending from the first diffusion region to the second diffusion region, a gate conductor filling the trench and having a top surface, and a wordline having a bottom adjacent the top surface of the gate conductor and a side aligned with the sidewall of the trench.

Inventors: Furukawa; Toshiharu (Essex Junction, VT), Gruening; Ulrike (Wappingers Falls, NY), Horak; David V. (Essex Junction, VT), Mandelman; Jack A. (Stormville, NY), Radens; Carl J. (LaGrangeville, NY), Rupp; Thomas S. (Stormville, NY)

Assignee: International Business Machines Corporation

International Classification: H01L 21/70 (20060101); H01L 21/8242 (20060101); H01L 021/824 ()

Expiration Date: 07/03/2018