Patent Number: 6,255,159

Title: Method to form hemispherical grained polysilicon

Abstract: A capacitor with Enhanced capacitance per cell area is provided. A container supported by a substrate is formed, followed by a first layer of undoped substantially amorphous silicon. Next, a layer of heavily doped amorphous silicon is formed on the first layer. A second layer of undoped amorphous silicon is formed on the doped layer. The layers are formed in a non-oxidizing ambient so that no oxide is formed between the layers. The structure formed is planarized to form separate containers made from the doped and undoped amorphous silicon layers. Any remaining oxide is then removed from the exterior sidewalls. Selected ones of the first and second undoped layers are seeded and annealed to convert the first and second layers to HSG. A dielectric layer and second electrode are formed to complete the cell capacitor.

Inventors: Thakur; Randhir P. S. (Boise, ID)

Assignee: Micron Technology, Inc.

International Classification: H01L 21/02 (20060101); H01L 21/8242 (20060101); H01L 21/70 (20060101); H01L 021/824 ()

Expiration Date: 07/03/2018