Patent Number: 6,255,169

Title: Process for fabricating a high-endurance non-volatile memory device

Abstract: A process for fabricating a non-volatile memory device includes the step of forming a nitrogen region in a semiconductor substrate prior to carrying out a thermal oxidation process to form a tunnel oxide layer. In a preferred process, nitrogen atoms are ion implanted into a silicon substrate to form a nitrogen region at the substrate surface. Then, a thermal oxidation process is carried out to grow a thin tunnel oxide layer overlying the surface of the nitrogen region. During the oxidation process, nitrogen is incorporated into the growing tunnel oxide layer. A floating-gate electrode is formed overlying the tunnel oxide layer and receives electrical charge transferred from a charge control region of the substrate through the tunnel oxide layer. The tunnel oxide layer is capable of undergoing repeated programming and erasing operations while exhibiting reduced effects from stress induced current leakage. In another aspect of the invention, an MOS transistor having enhanced carrier mobility is obtained by forming a gate oxide layer over a nitrogen region of a silicon substrate. The thermal oxidation process of the invention also provides both tunnel oxide layers and gate oxide layers having a reduced thickness for a given set of thermal oxidation conditions.

Inventors: Li; Xiao-Yu (San Jose, CA), Xiang; Qi (Santa Clara, CA), Mehta; Sunil D. (San Jose, CA)

Assignee: Advanced Micro Devices, Inc.

International Classification: H01L 21/70 (20060101); H01L 21/8247 (20060101); H01L 021/824 ()

Expiration Date: 07/03/2018