Patent Number: 6,255,170

Title: Flash memory and method for fabricating the same

Abstract: A memory device and a method for manufacturing the same is provided that reduces a resistance of the source region and reduces an effective cell size. The memory includes tunnel insulating films and floating gates formed stacked on a plurality of prescribed regions of a semiconductor substrate, a plurality of stacked gate insulating films, control gate lines and gate cap insulating films extend in a first direction with a zigzag pattern to cover the floating gates. Thus, the distance between adjacent control gate lines varies. Source regions are formed in the semiconductor substrate where a narrow space exists between the control gate lines stacked on the floating gates, and drain regions are formed in the semiconductor substrate where a wider space exists between the control gate lines stacked on the floating gates. Source contact regions are formed to expose the source regions, and a first conductive plate is coupled to the source regions. Bit line contact regions are formed to expose the drain regions. A second conductive line is formed in a direction crossing the control gate lines at a right angle coupled to the drain regions. The contact regions are formed in a zigzag pattern.

Inventors: Yu; Jae Min (Chungcheongbuk-do, KR)

Assignee: Hyundai Electronics Industries, Co., Ltd.

International Classification: H01L 21/70 (20060101); H01L 27/115 (20060101); H01L 21/8247 (20060101); H01L 021/824 ()

Expiration Date: 07/03/2018