Patent Number: 6,255,192

Title: Methods for barrier layer formation

Abstract: An improved microelectronic device and methods for forming the device are disclosed. The device includes a conductive feature formed on a semiconductor wafer by creating a trench within an insulating material, depositing barrier material substantially only within the trench, depositing conductive material on the wafer surface and within the trench, and removing the conductive material from the wafer surface. Alternately, the barrier material may be deposited onto the wafer surface and the trench and removed from the wafer surface prior to conductive material deposition.

Inventors: Dornisch; Dieter (Carlsbad, CA)

Assignee: Conexant Systems, Inc.

International Classification: H01L 23/52 (20060101); H01L 21/70 (20060101); H01L 23/485 (20060101); H01L 21/768 (20060101); H01L 23/48 (20060101); H01L 23/532 (20060101); H01L 21/02 (20060101); H01L 21/285 (20060101); H01L 21/321 (20060101); H01L 021/76 ()

Expiration Date: 07/03/2018