Patent Number: 6,294,812

Title: High density flash memory cell

Abstract: A flash memory cell. A spacer is formed on a sidewall of a controlling gate. A self-aligned source/drain region can thus be formed by the formation of the spacer. The tunneling oxide layer is then formed on the source/drain region instead of on the controlling gate. Thus, the tunneling oxide layer is formed with a self-aligned process.

Inventors: Ding; Yen-Lin (Hsinchu, TW), Hong; Gary (Hsinchu, TW)

Assignee: United Microelectronics Corp.

International Classification: H01L 27/115 (20060101); H01L 21/70 (20060101); H01L 21/8247 (20060101); H01L 029/788 ()

Expiration Date: 09/25/2018