Patent Number: 6,294,838

Title: Multi-chip stacked package

Abstract: Two IC chips in a multiple-chip module are stacked together on a common lead frame or substrate of a ball-grid array package to save space. The top chip is wire-bonded to the lead frame. The bottom chip is flip-chip bonded to the lead frame, thus allowing more leads. The common substrate of the two chips are connected together by a conductive layer of metal plate, solder or conductive epoxy. The connecting layer may serve as a heat sinking element or a common electrical terminal.

Inventors: Peng; Gentle (Hsin-Chu, TW)

Assignee: Utron Technology Inc.

International Classification: H01L 25/065 (20060101); H01L 023/48 (); H01L 023/52 (); H01L 029/40 ()

Expiration Date: 09/25/2018