Patent Number: 6,294,839

Title: Apparatus and methods of packaging and testing die

Abstract: Apparatus and methods of packaging and testing die. In one embodiment, a stacked die package includes a packaging substrate having a first surface with a recess disposed therein and a plurality of conductive leads coupled thereto, a first die attached to the packaging substrate within the recess and having a plurality of first bond pads electrically coupled to at least some of the conductive leads, and a second die attached to the first die and having a plurality of second bond pads that are electrically coupled to at least some of the conductive leads. When the stacked die package is engaged with, for example, a circuit board, the first surface of the packaging substrate is proximate the circuit board so that the packaging substrate at least partially encloses and protects the first and second die. The properties and dimensions of the packaging substrate are tailored to optimize the operational environment of the die, including improving thermal dissipation and enhancing performance of the die. In an alternate embodiment, the packaging substrate comprises an electrically conductive substrate and an electrically insulative material is formed between the conductive leads and the packaging substrate. In another embodiment, the first bond pads are electrically coupled to the conductive leads by wire-bonding. Alternately, the first bond pads are in direct contact with the conductive leads in a flip chip arrangement. In another embodiment, the die is sealed within an encapsulating layer to protect the first and second die.

Inventors: Mess; Leonard E. (Boise, ID), Corisis; David J. (Meridian, ID), Moden; Walter L. (Meridian, ID), Kinsman; Larry D. (Boise, ID)

Assignee: Micron Technology, Inc.

International Classification: H01L 25/065 (20060101); H01L 23/02 (20060101); H01L 23/055 (20060101); H01L 21/66 (20060101); H01L 023/48 (); H01L 023/52 (); H01L 023/40 ()

Expiration Date: 09/25/2018