Patent Number: 6,294,930

Title: FPGA with a plurality of input reference voltage levels

Abstract: The invention comprises an FPGA having a plurality of input reference voltages and/or output voltage supplies. In one embodiment, two or more differential amplifiers in the same configurable input buffer use different input reference voltages. According to a second aspect of the invention, the I/O pad line is configurably connected to the input reference voltage line, so that any configurable Input/Output Block (IOB) can be used to supply the input reference voltage. According to a third aspect of the invention, the reference input of an I/O is configurably connected to any of two or more input reference voltage lines. According to another aspect of the invention, a single input reference voltage and/or a single output voltage supply is applied to each IOB, with the IOBs grouped into sets. Each set of IOBs has a separate input reference voltage and/or a separate output voltage supply.

Inventors: Goetting; F. Erich (Cupertino, CA), Frake; Scott O. (Cupertino, CA), Kondapalli; Venu M. (San Jose, CA), Young; Steven P. (San Jose, CA)

Assignee: Xilinx, Inc.

International Classification: G06F 7/38 (20060101); G06F 007/38 ()

Expiration Date: 09/25/2018